Tells you in one page whether the toolchain, flash path and serial monitor work.
Bring-upSerial logESP32 family
Official path: examples/get-started/hello_world
01 Overview
The official Hello World prints a counter. It validates IDF, UART and the chip clock — not a product feature.
It solves the question 'can a new environment run?': new PC, new module lot, new factory flash station. If it passes, the toolchain and hardware path are OK.
Typical scenarios: a dev machine just installed ESP-IDF, a batch of new modules, or first bring-up of a production flash station.
It does not validate Wi-Fi, Bluetooth, peripheral drivers, or business logic — it only proves that app_main runs and UART logs appear.
The official example does not cover log-level policy, disabling ROM prints, or sealing the debug port for production; those are left to the product.
02 Hardware
Chip: any ESP32 family target that supports ESP-IDF, such as ESP32, ESP32-S3, ESP32-C3.
Minimum parts: USB-UART (on-board or external). Do not rely only on USB-Serial-JTAG if you will debug sleep, as it may not wake or log properly.
Pins: UART0 by default, often GPIO1 (TX) and GPIO3 (RX). If the custom board moves the port, the dongle must follow.
Power: flashing draws more than idle; weak USB cables fail here, causing flash errors or resets.
Connectors: dev boards usually have an on-board USB-UART and a Micro-USB or USB-C port; custom boards need to bring out UART0 or a programming header.
Layout watch: if using an external USB-UART, ensure TX/RX are crossed and grounds are common.
03 Software flow
1. Install ESP-IDF and set up the environment, then run idf.py set-target to select the target chip (e.g., esp32, esp32s3).
2. Build the firmware: idf.py build.
3. Connect the board and flash with idf.py -p PORT flash.
4. Open the serial monitor with idf.py -p PORT monitor and observe the log output.
5. In app_main, the official example uses printf in a loop with a delay, printing an incrementing counter.
6. Exit the monitor with Ctrl+].
7. In product code, replace printf with ESP_LOGx macros and configure log levels for release, dropping verbose output.
04 Core points
This is a fixture, not a feature. Do not stop at this page when a customer asks what the product does.
Baud, port and chip target must match. Otherwise 'no logs' might actually be the wrong chip or miswired lines.
Plan how the board is programmed after the enclosure is closed — that leads to OTA.